Number systems and binary representation
- Explain the digital abstraction and logic levels
- Convert among binary, octal, decimal, and hexadecimal
- Explain positional notation
- Determine the range of an unsigned value
- Recognize extension, truncation, overflow, and wraparound
Explanation
A bit pattern needs an interpretation
Digital hardware stores bits. A bit pattern alone does not say whether it is an unsigned number, a signed number, a fraction, an instruction, or a set of control flags. The design specification supplies that meaning.
Digital abstraction and logic families
A schematic or RTL model uses exact symbols such as 0 and 1, while a physical pin carries a voltage that changes over time. A logic family defines electrical limits that let circuits interpret voltage ranges reliably. CMOS and TTL are familiar families, but a real interface must use the limits in its component or library specification.
Typical specification names are:
| Limit | Meaning |
|---|---|
VIL(max) |
Highest input voltage guaranteed to be read as logic 0 |
VIH(min) |
Lowest input voltage guaranteed to be read as logic 1 |
VOL(max) |
Highest low voltage a driver guarantees under stated load |
VOH(min) |
Lowest high voltage a driver guarantees under stated load |
Voltages between the guaranteed input-low and input-high regions are not valid steady logic levels. Noise margin is the gap between a driver's guaranteed output and a receiver's required input. Compatible-looking 0/1 behavior is insufficient when voltage, current, edge rate, or I/O-standard requirements do not match.
Digital simulation may also show X for unknown and Z for high impedance. These are modelling states, not two additional Boolean voltage levels. An X can expose uninitialized state, conflicting drivers, or insufficient information. A Z usually models a disconnected or tri-stated connection. Their exact treatment depends on the HDL and simulation context covered in later courses.
The abstraction is useful because engineers can reason with bits after the electrical contract is established. Clock-domain, timing, power, and physical checks still connect that bit-level behavior to real hardware.
For an unsigned binary value, each position has a power-of-two weight. In 10110, the rightmost position has weight 1, followed by 2, 4, 8, and 16:
| Bit | 1 | 0 | 1 | 1 | 0 |
|---|---|---|---|---|---|
| Weight | 16 | 8 | 4 | 2 | 1 |
| Contribution | 16 | 0 | 4 | 2 | 0 |
The value is therefore 16 + 4 + 2 = 22.
Binary, octal, decimal, and hexadecimal
| System | Base | Digits | Useful grouping |
|---|---|---|---|
| Binary | 2 | 0–1 | Native bit representation |
| Octal | 8 | 0–7 | 3 binary bits per digit |
| Decimal | 10 | 0–9 | Human arithmetic |
| Hexadecimal | 16 | 0–9, A–F | 4 binary bits per digit |
Hexadecimal makes long bit vectors easier to read. Group binary bits from the right in sets of four:
Binary: 1010 0110
Hexadecimal: A 6 = 0xA6
Decimal: = 166
Octal uses groups of three. Leading zeros may be added for grouping without changing an unsigned value.
A dependable conversion method
To convert decimal to binary, repeatedly divide by two and record the remainder. Read the remainders upward. For 13:
13 / 2 = 6 remainder 1
6 / 2 = 3 remainder 0
3 / 2 = 1 remainder 1
1 / 2 = 0 remainder 1
13 decimal = 1101 binary
For hexadecimal, divide by 16 or convert through groups of four binary bits. Always state the radix. The text 10 means ten in decimal but two in binary.
Width and unsigned range
An unsigned N-bit value represents:
minimum = 0
maximum = 2^N - 1
number of distinct patterns = 2^N
An 8-bit unsigned value ranges from 0 through 255. It cannot represent 256.
Extension and truncation
Zero extension increases an unsigned width by adding zeros on the left:
8-bit 1010_0110
12-bit 0000_1010_0110
Truncation removes bits. Removing only leading zeros preserves an unsigned value. Removing a set high bit changes it. Before narrowing a bus, prove that all discarded bits are zero or define the intended overflow behavior.
Overflow, saturation, and wraparound
Overflow means the mathematical result lies outside the destination range. Four-bit unsigned addition illustrates three possible policies:
14 + 5 = 19 mathematically
4-bit wraparound result = 3 because 19 modulo 16 = 3
saturating result = 15 maximum 4-bit value
extended exact result = 1_0011 needs 5 bits
Hardware does exactly what its width and logic specify. It does not automatically warn that a carry was discarded. A requirement must say whether to keep a carry, wrap, saturate, or raise an overflow flag.
Questions to ask in a design review
- What is the width and radix?
- Is the value signed or unsigned?
- What is its legal range?
- Can an operation produce an extra bit?
- What happens when the result is outside the range?
- Are extension and truncation explicit?
- Does an external signal meet the required electrical logic standard?
Worked example
A packet counter is 10 bits wide and unsigned.
- It has
2^10 = 1024possible patterns. - Its legal range is 0 through 1023.
- Decimal 700 is
0x2BC, or binary10_1011_1100. - Adding 400 produces 1100, which needs 11 bits.
- With simple 10-bit wraparound, the stored result is
1100 - 1024 = 76. - With saturation, the stored result is 1023 and an overflow indication may be asserted.
Both results are valid implementations of different requirements. The engineer must define and verify the required policy.
Check yourself
Why is the declaration “8-bit value” incomplete for arithmetic? What information must be added before you can interpret its range and overflow behavior? Why are physical voltage thresholds still relevant when RTL uses only logic symbols?