Week 1 · Day 5 · 7 hours

Foundation – Sequential + Basic C⁠+⁠+

Linux, GVim, Shell, Digital Design, Basic C++

Open supporting lesson → Week 1 assessment View in full programme
Daily plan

What you will learn and practise

Complete the stages in order and retain the requested evidence.

Theory · 2h

Latch/flip-flop/register/counter
Clock/reset; Moore/Mealy FSM
C++ variables, loops, functions, arrays, strings
References, pointers, classes, constructors, inheritance

Guided lab · 2h

1. DFF timing
2. Register/shift register
3. Counter
4. Moore vs Mealy sequence detector
5. C++ calculator
6. Array min/max

Independent lab · 2h

7. String handling
8. Function/reference/pointer exercises
9. Transaction class
10. Constructor
11. Base/derived transaction classes

Debug and assignment · 1h

Week-1 practical: Linux + GVim + C++
20-minute digital design quiz

Expected deliverable

Foundation assessment + C++ transaction model

Practical work

Connect sequential-logic reasoning with Basic C++ programming and build the Week 1 transaction model.

Setup
  1. Use the Digital Design course for sequential-logic reference material.
  2. Create C++ work under project_workspace/cpp.
  3. Compile and run the transaction example from the command line.
Execution steps
  1. Analyse DFF timing and reset behaviour.
  2. Work through register, shift-register and counter behaviour.
  3. Compare Moore and Mealy sequence-detector structure.
  4. Write a small C++ calculator and array min/max exercise.
  5. Practise strings, functions, references and pointers.
  6. Implement a transaction class with fields, constructor and print/display behaviour.
  7. Create a base/derived transaction example to demonstrate inheritance.
Debug challenge

Complete the Week 1 Linux + GVim + C++ practical and the 20-minute digital-design quiz before starting the Foundation Assessment.

Evidence to retain
  • sequential-logic notes/quiz
  • C++ source
  • transaction class output
  • base/derived class example
Completion criteria
  • C++ code compiles and runs
  • Transaction object output is understandable
  • Learner can explain basic sequential behaviour and the C++ class structure
Worked code

Minimal C++ transaction model for SystemVerilog preparation

Read the example, predict the output, compile it, then compare the actual result.

#include <iostream>
#include <string>

class Transaction {
public:
    unsigned address;
    unsigned data;
    bool write;

    Transaction(unsigned addr, unsigned value, bool is_write)
        : address(addr), data(value), write(is_write) {}

    virtual void print() const {
        std::cout << (write ? "WRITE" : "READ")
                  << " address=0x" << std::hex << address
                  << " data=0x" << data << std::dec << '\n';
    }

    virtual ~Transaction() = default;
};

class ErrorTransaction : public Transaction {
public:
    using Transaction::Transaction;

    void print() const override {
        std::cout << "ERROR: ";
        Transaction::print();
    }
};

int main() {
    Transaction normal(0x10, 0xA5, true);
    ErrorTransaction error(0x20, 0x00, false);
    normal.print();
    error.print();
    return 0;
}
Compile and run
  1. g++ -std=c++17 -Wall -Wextra transaction.cpp -o transaction
  2. ./transaction
Expected output
WRITE address=0x10 data=0xa5
ERROR: READ address=0x20 data=0x0
Weekly checkpoint

Foundation Assessment

2.0 h · 100 marks · Scripts + C++ transaction class

Review Week 1 assignment →