Verilog Verification – Advanced TB
Testbenches, self-checking, regression, debugging
What you will learn and practise
Complete the stages in order and retain the requested evidence.
Reusable tasks/functions
File I/O concepts
Memory initialization
Random seeds/repeat loops
Basic regression scripting
1. Task library
2. Stimulus vector loop
3. Read test vectors from file
4. Write results to file
5. Memory preload
6. Multi-test selection
7. Seeded random runs
8. Batch 10 simulations
9. Log naming
10. Regression summary extraction
11. Waveform-on-fail flow
Debug non-reproducible random failure using seed
Build 5-test mini regression
Automated mini regression
Build a reproducible Verilog verification workflow using reusable tasks/functions, file-driven stimulus, deterministic seeded runs, batch execution, structured logs, regression summaries and waveform-on-fail evidence.
- Create project_workspace/week4_verilog_verification/day18_advanced_tb with rtl, tb, vectors, sim, logs, waves, scripts and reports directories.
- Carry forward Day 17 self-checking PASS/FAIL discipline so every batch test has an objective result.
- Use plain Verilog plus shell scripting only; SystemVerilog classes/interfaces, constrained randomization, SVA, coverage and UVM are outside Week 4.
- Create a reusable Verilog task/function library for stimulus, checking and result reporting.
- Create a text stimulus-vector file and load deterministic vectors with Verilog file I/O or memory initialization constructs.
- Execute vector-driven checks automatically and write a structured result log rather than judging waveforms manually.
- Add a repeat loop that generates pseudo-random operand/stimulus values while preserving a user-selected seed.
- Accept or record a seed so a failing pseudo-random run can be reproduced exactly.
- Provide multiple named tests such as smoke, boundary, arithmetic, negative and seeded-random.
- Create a shell regression runner that executes at least five named tests without manual intervention.
- Give every run a distinct log name containing the test name and seed where relevant.
- Extract TOTAL/PASS/FAIL information from the run logs into a compact regression summary.
- Enable waveform dumping for a failing run and retain the failing VCD while allowing clean passing runs to remain log-driven.
- Force one deterministic seeded failure, reproduce it with the same seed, diagnose the failing vector, then patch and rerun the mini regression.
- Archive the final clean regression summary together with the reproduced-failure evidence.
- Explain why a regression must be reproducible and why a seed must be retained with a random failure.
- Document the format of the stimulus-vector file and how each field maps to DUT inputs and expected results.
- Prepare a five-test regression matrix listing test name, purpose, input source, seed if applicable, expected result and retained evidence.
- Explain the difference between a simulation log, a regression summary and a waveform, and when each is most useful for debug.
- Document one reproduced seeded failure using seed, failing vector, log evidence, waveform evidence, root cause, patch and clean rerun.
Create a repeatable pseudo-random failure, record its seed, reproduce the same failure from that seed, isolate the exact failing transaction/vector using the log and VCD, patch the defect, then rerun the same seed and the complete five-test regression to PASS.
- rtl/dut.v, tb/tb_regression.v and tb/tb_utils.v
- vectors/day18_vectors.txt
- scripts/run_regression.sh
- logs/ containing one log per named test and the reproduced failing-seed log
- waves/ containing the failing-run VCD
- reports/day18_regression_summary.txt containing test-level PASS/FAIL results
- At least five named tests execute from one regression command.
- File-driven stimulus is parsed and checked automatically.
- Seeded pseudo-random execution records enough information to reproduce a failure.
- A failing seed is reproduced before the defect is patched.
- Final regression summary reports all required tests PASS with no unresolved failure.
- Logs, failing waveform and regression summary are retained under project_workspace.
Understand the architecture and debug flow
Vectors, seeds, logs and waveform-on-fail evidence make regression failures reproducible.
A compact regression combines smoke, file-driven, seeded, boundary and negative testing.
Build, run and retain evidence
project_workspace/week4_verilog_verification/day18_advanced_tb/
rtl/dut.vtb/tb_utils.vtb/tb_regression.vvectors/day18_vectors.txtscripts/run_regression.shsim/day18_regression.vvplogs/waves/reports/day18_regression_summary.txt
- Smoke test checks basic legal DUT operation.
- Boundary test exercises minimum/maximum and transition-edge values.
- File-vector test consumes vectors/day18_vectors.txt and self-checks each entry.
- Negative/error-oriented test verifies the documented response to an invalid or error-provoking case supported by the DUT.
- Seeded-random test records the seed and self-checks every generated transaction.
- Regression runner executes at least five named tests and creates separate logs.
- Regression summary identifies each test as PASS or FAIL and records the relevant seed.
- A deliberately failing seeded run is reproduced with the identical seed before repair.
- After repair, the same seed and complete mini regression pass.
iverilog -g2012 -Wall -o sim/day18_regression.vvp rtl/dut.v tb/tb_utils.v tb/tb_regression.vRunsh scripts/run_regression.shWaveformgtkwave waves/day18_fail.vcd- Compilation completes without errors.
- At least five tests run from scripts/run_regression.sh without manual testbench editing.
- File-driven and seeded-random tests are self-checking.
- The injected/reproduced failure has matching seed and retained log/VCD evidence.
- Final reports/day18_regression_summary.txt shows every required test PASS.
- All required evidence remains under project_workspace/week4_verilog_verification/day18_advanced_tb/.
Review before completing Day 18
- Concept
Why is file-driven stimulus useful in a reusable Verilog testbench?
Review answer
It separates test data from testbench control code, allowing vectors to be changed or expanded without repeatedly rewriting the stimulus engine and making batch tests easier to reproduce.
- Reproducibility
What information must be retained when a pseudo-random test fails?
Review answer
At minimum the test identity, seed, failing transaction or vector, simulator/log evidence and relevant configuration must be retained so the same failure can be recreated.
- Regression
What makes a group of simulations a regression rather than a set of unrelated manual runs?
Review answer
A regression has a repeatable runner, named tests, consistent result criteria, separate evidence per run and an automatically or systematically produced summary across the test set.
- Debug
Why should a failing seed be rerun before changing the RTL or testbench?
Review answer
Reproducing the failure proves that the problem is deterministic under the recorded conditions and establishes a stable baseline for root-cause analysis and fix verification.
Advanced Verilog testbench and mini regression
- Build reusable task/function-based verification utilities.
- Drive and check simulations from external vector data.
- Run deterministic seeded pseudo-random tests and reproduce failures.
- Automate multiple named simulations through a batch regression runner.
- Create per-test logs and a consolidated PASS/FAIL regression summary.
- Retain waveform-on-fail evidence and prove a patch with same-seed and full-regression reruns.
Assessment: Week 4 automated testbench, seeded failure reproduction, mini-regression execution, regression summary and debug evidence