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Learning/Knowledge checks/Digital Design Fundamentals/Combinational design/Check

Module checkpoint

Combinational design knowledge check

Answer every question from your current understanding. After submission, compare your reasoning with the explanation and revisit any weak concept.

This check covers Multiplexers, encoders, decoders and comparators, Adders, shifters, ALUs, parity and CRC. Read them first if you have not.

6 QuestionsOne Answer eachImmediate ScoreDetailed Explanations

Read→Reason→Select→Review

Question 1 of 6What does a 4-to-1 multiplexer do?

Encodes four inputs into two bitsSelects one of four inputsActivates one of four outputs

Question 2 of 6What creates the longest delay in a basic ripple-carry adder?

Computing each stage's generate termLoading on the operand input pinsCarry rippling through every stage

Question 3 of 6What defect can result from an output that is not assigned on every combinational path?

A compile error that stops synthesisAn unintended latch or stale outputOutput forced to zero on missed paths

Question 4 of 6What can a single parity bit reliably detect?

Any odd number of bit flips in the wordThe location of a single errorEvery possible multi-bit error

Question 5 of 6What must be true of a purely combinational output?

It changes only on a clock edgeIt depends only on current inputsIt retains an earlier value without storage

Question 6 of 6Why is a default assignment useful before an if or case decision?

It forces synthesis to infer a registerIt assigns the output on every decision pathIt sets the reset value of the output

Review every selection before submitting. You can retry after reading the explanations.

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